• Malfeasant@lemm.ee
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    3 days ago

    an x86 assembly programmer

    Ftfy. not all CPUs have an xor register with itself instruction.

    • Q*Bert Reynolds@sh.itjust.works
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      2 days ago

      There are a lot more architectures than just x86 that are capable of XORing a register with itself (ie. ARM and RISC-V), and if you took OP to mean the accumulation register specifically, pretty much all CPUs going back as far as I can think have had that functionality.

      • Malfeasant@lemm.ee
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        2 days ago

        Yes, but it’s not universal that xoring a register with itself is more performant than simply loading it with 0.

            • Q*Bert Reynolds@sh.itjust.works
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              1 day ago

              No argument there. It’s also why it’s done in ARM, 8080, SM83, z80, 6502, and basically every other assembly language. It’s only not done in RISC-V because you can fold 0 into any instruction as an operand, therefore eliminating the need to clear a register before an instruction.

              So why correct the person with a more narrow claim that makes it seem like xor being faster than loading zero is a rarity in CPU architectures? If I said “birds can fly”, and your response was “eagles can fly. Ftfy. Not all birds can fly”, it would be both true and utterly unhelpful.